MT
Analog & Mixed-Signal Layout Engineer
Accepting applicationsMirafra Technologies · Austin, TX
Full-Time Mid_senior AnalogCMOSFinfetMixed-SignalPERL
Posted
27 Apr
Category
Design
Experience
Mid_senior
Country
United States
The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm.
Qualifications
10+ years experience in high performance analog layout in advance Finfet/CMOS process nodes
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
Should be able to lead the project
Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
Layout Automation using SKILL/PERL/Python is a plus
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Qualifications
10+ years experience in high performance analog layout in advance Finfet/CMOS process nodes
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
Should be able to lead the project
Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
Layout Automation using SKILL/PERL/Python is a plus
Show more Show less