Analog/Mixed-Signal Layout Engineer

Job Description

MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity. We are seeking an exceptional layout candidate that can develop high-quality layouts in cutting edge technologies for advanced data converters, power management, and various other IP, from initial planning to final database sign-off. The candidate will join a diverse and highly motivated group working on emerging applications in the consumer and enterprise space within a fast-paced environment. The candidate should be familiar with layout techniques to optimize matching, minimize noise coupling and supply line drops, reduce parasitics, and other optimizations.

Main Requirements and Qualifications

- Bachelor degree with 6 years of experience or equivalent.
- Work closely with designers to discuss circuit concerns, and develop effective solutions together.
- Able to assume responsibility, work independently, and deliver high-quality layouts on schedule.
- ADC, DAC, Bias, LDO layout experience in deep sub-micron CMOS and FinFET technologies.
- Experience with double/multiple patterning processes.
- Experience with EM/IR tools and results analysis.
- Familiar with Layout-Dependent Effects (LDE) and how to mitigate/fix existing affected areas.
- Solid understanding of traditional analog circuit operation.
- Capability to innovate and optimize layout solutions for power, performance, and area.
- Proficient with Virtuoso L/XL layout tool.
- Proficient with Calibre verification tool and runset violation analysis.
- Experience generating parasitic extractions using Star, QRC, or similar tool.
- Strong interpersonal, teamwork, and communication skills.
Nice To Have:
- Minimum 2 years FinFET experience.
- Experience floorplanning top-level IP and assigning tasks to available resources.
- Experience with version control tools (SOS, ICManage, etc.).
- Rudimentary knowledge of tool flows (especially checking *.log files) for basic self-debug.
- SKILL coding experience.
- Experience working with off-site layout resources and support.
- Enthusiasm to contribute to improving group layout methodologies.
- Experience with self-analyzing parasitic extractions for root causes of performance degradation.

Salary range: $140,600 - $200,300 annually.


Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.


MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

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