Analog / Mixed-Signal IC Design Engineer - Senior to Principal

Senior / Principal Analog Mixed-Signal IC Engineer
Waltham, Massachusetts | Hybrid – 3 days on-site
$160,000 – $325,000 depending on level + equity
Visa transfers and new sponsorship considered

We’re working with a venture-backed semiconductor company developing a fundamentally different approach to compute.

Rather than treating thermal noise as something to eliminate, the architecture deliberately harnesses it. The team is developing thermodynamic computing hardware that uses analog CMOS circuitry to generate and sample programmable probability distributions directly in silicon.

Their first-generation processor has taped out, and they are now developing multiple next-generation chips.

As part of that expansion, they’re hiring Senior and Principal Analog/Mixed-Signal IC Engineers to join a small, highly technical team in Waltham.

This isn’t a role where you’ll spend years confined to one narrow IP block. They want engineers with strong transistor-level fundamentals who can move across different circuit problems and take meaningful ownership of silicon.

What you’ll work on
Depending on your background, you could work across:
Data converters including ADCs and DACs
PLLs, VCOs, oscillators and clock-generation circuitry
Comparators and precision analog circuits
Bandgaps, references, LDOs and on-chip regulation
Low-power and sub-threshold CMOS
Calibration and compensation for process and circuit non-idealities
Mixed-signal interfaces and signal chains

You’ll work from architecture and circuit definition through schematic design, simulation, verification and silicon bring-up.

You’ll also do your own layout. This is a team where designers stay hands-on through physical implementation, extraction and verification rather than handing designs to a separate layout organisation.

What we’re looking for
You should have:
Strong hands-on CMOS analog or mixed-signal IC design experience
Excellent transistor-level circuit fundamentals
Experience taking custom IC designs through the development lifecycle
Hands-on experience with Cadence Virtuoso/Spectre or equivalent
Ability and willingness to perform your own custom layout
Strong understanding of device behaviour, noise, stability, process variation and circuit trade-offs
Experience with one or more areas such as ADCs/DACs, PLLs, oscillators, comparators, references, regulators or SerDes
MS or PhD in Electrical Engineering or a closely related field

Engineers coming directly from advanced academic or research programmes are encouraged to apply, particularly where their work involved hands-on transistor-level IC design and silicon.
Experience with advanced CMOS/FinFET nodes is valuable, but strong circuit fundamentals matter more than experience on one particular process.

Senior or Principal?
At Senior level, we’re looking for strong hands-on circuit designers capable of independently owning blocks and taking them through implementation.

At Principal level, the scope becomes considerably broader. You could define architecture, own major portions of next-generation silicon and potentially take responsibility for a chip from concept through tapeout.

The company is deliberately flexible around years of experience. Technical depth, circuit intuition and evidence of building real silicon matter more than title.

Why consider it?
The opportunity is unusual: hardcore transistor-level IC design applied to a genuinely different computing architecture.

The IC team is small, giving individual engineers considerably more influence over architecture and finished silicon than they would typically have inside a large semiconductor organisation.

The company is venture-backed and has signed a letter of intent with the U.S. Department of Commerce for up to $75M through the CHIPS R&D programme to support scaling and domestic manufacturing.

For engineers coming from established semiconductor companies, the proposition is simple: less distance between you, the architecture and the finished silicon — and significantly more technical ownership.

Compensation: $160,000 – $325,000 depending on level + equity
Location: Waltham, Massachusetts
Working pattern: Hybrid, 3 days per week on-site
Immigration: Visa transfers and new sponsorship considered

If you have a strong analog/mixed-signal IC background and the idea of building a computing architecture where noise becomes part of the computation rather than something to suppress sounds technically interesting, we’d like to hear from you.
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