LR
Analog/Mixed-Signal IC Design Engineer
Accepting applicationsLangham Recruitment · San Jose, CA
Full-Time Mid_senior AIAnalogCMOSCadenceMATLAB
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
United States
Analog/Mixed-Signal IC Design Engineer - Optical & Electrical Interconnects
$200,000 – $350,000 + Bonus + Equity
Hybrid - Bay Area or LA
Senior, Principal and Team Lead
A fast-growing interconnect team is hiring an experienced analog/mixed-signal engineer to help develop next-generation electrical and optical transceivers for AI, cloud, and high-performance computing.
You’ll work on 100G/lane PAM4+ SerDes and silicon photonics-based transceivers, bridging electrical IC and photonic IC design.
What you’ll do
Design high-speed analog/mixed-signal blocks (drivers, TIAs, PLLs, CDRs, ADC/DACs)
Work on electro-optic systems and co-simulation with photonic devices (MRM, MZM, EAM, PD)
Define EIC/PIC partitioning and high-speed link budgets
Collaborate on packaging, SI/PI, DSP partitioning, and system integration
Support silicon bring-up, debug, and production ramp
What we’re looking for
MS/PhD in EE, Physics, or related field
Strong high-speed analog CMOS design background
Familiarity with SerDes or optical transceivers
Exposure to silicon photonics (preferred)
Experience with Cadence + MATLAB/Python
Understanding of optical link metrics (BER, TDECQ, OMA, etc.)
Nice to have
Verilog-A / photonic modelling experience
Lumerical tools exposure
CPO / advanced optical packaging experience
Lab bring-up of high-speed or electro-optic silicon
Compensation & Benefits
Base salary range: $200,000 – $350,000.
Eligibility for performance-based bonuses and short- and long-term incentive programs.
Competitive benefits package including health, life, and disability insurance, PTO, parental leave, and additional employee benefits.
Show more Show less
$200,000 – $350,000 + Bonus + Equity
Hybrid - Bay Area or LA
Senior, Principal and Team Lead
A fast-growing interconnect team is hiring an experienced analog/mixed-signal engineer to help develop next-generation electrical and optical transceivers for AI, cloud, and high-performance computing.
You’ll work on 100G/lane PAM4+ SerDes and silicon photonics-based transceivers, bridging electrical IC and photonic IC design.
What you’ll do
Design high-speed analog/mixed-signal blocks (drivers, TIAs, PLLs, CDRs, ADC/DACs)
Work on electro-optic systems and co-simulation with photonic devices (MRM, MZM, EAM, PD)
Define EIC/PIC partitioning and high-speed link budgets
Collaborate on packaging, SI/PI, DSP partitioning, and system integration
Support silicon bring-up, debug, and production ramp
What we’re looking for
MS/PhD in EE, Physics, or related field
Strong high-speed analog CMOS design background
Familiarity with SerDes or optical transceivers
Exposure to silicon photonics (preferred)
Experience with Cadence + MATLAB/Python
Understanding of optical link metrics (BER, TDECQ, OMA, etc.)
Nice to have
Verilog-A / photonic modelling experience
Lumerical tools exposure
CPO / advanced optical packaging experience
Lab bring-up of high-speed or electro-optic silicon
Compensation & Benefits
Base salary range: $200,000 – $350,000.
Eligibility for performance-based bonuses and short- and long-term incentive programs.
Competitive benefits package including health, life, and disability insurance, PTO, parental leave, and additional employee benefits.
Show more Show less
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