Analog Layout Engineer - Lead

Company Description SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The organization offers strong capabilities across the semiconductor design spectrum, including Analog Circuit Design, RTL Design, Design Verification, Custom Layout, Physical Design, Embedded Design, AMS Verification, and full-chip/SoC backend design. With expertise spanning mature nodes like 28nm, 40nm, 65nm and above, as well as advanced nodes such as 7nm, 5nm, 3nm and emerging nodes like 2nm and 18A, SiMaxTech supports next-generation product development with high performance and quality. The company is driven by a culture of continuous learning, innovation, and execution excellence, and is expanding across all semiconductor domains to provide holistic, scalable solutions throughout the chip development lifecycle. SiMaxTech’s vision is to become the preferred semiconductor design partner globally, with a mission centered on customer-focused, reliable, and scalable engineering services.

Role Description The Analog Layout Engineer - Lead is a full-time, on-site role based in Bengaluru South. The role involves leading the design and development of analog custom layouts, collaborating closely with circuit design engineers to translate schematics into optimized layouts that meet performance, area, and reliability targets. Day-to-day responsibilities include planning and executing layout strategies, performing floorplanning, device matching, parasitic optimization, and layout-level design improvements across various technology nodes. The lead engineer will oversee layout reviews, coordinate with physical verification teams to resolve DRC/LVS/ESD/ERC issues, and ensure adherence to foundry rules and best practices. The role also includes mentoring junior layout engineers, contributing to design methodology improvements, and supporting cross-functional teams to meet project schedules and quality standards.

Experience: 4 - 13 years
Location: Bangalore
Notice period: Immediate to 30 days

Qualifications
Candidates should possess strong skills in Layout Design and Custom Layout for analog and mixed-signal blocks.
Candidates should possess solid Circuit Design, Analog, and Analog Circuits knowledge to effectively collaborate with design teams.
Candidates should possess expertise in Physical Verification, including DRC, LVS, and reliability checks, across multiple technology nodes.
Experience with industry-standard EDA tools (such as Cadence Virtuoso, Synopsys, Mentor/Siemens tools) for analog layout and verification.
Hands-on experience with advanced process nodes (e.g., 28nm and below), with exposure to 7nm, 5nm, 3nm or similar advanced technologies preferred.
Proven ability to lead projects, review layouts, and mentor junior engineers in a fast-paced design environment.
Strong problem-solving skills, attention to detail, and ability to work collaboratively with cross-functional engineering teams.
Bachelor’s or
Show more Show less