Analog Layout Engineer

This role is for one of the Weekday's clients

Salary range: Rs 800000 - Rs 1000000 (ie INR 8-10 LPA)

Experience: 4+ yrs

Location: Hyderabad

Job Type: full-time

We are seeking a highly skilled Analog Layout Engineer with expertise in custom layout design for analog and mixed-signal integrated circuits. This role involves developing high-quality layouts for complex analog and high-speed circuit blocks while ensuring compliance with design specifications, process requirements, and physical verification standards.

The ideal candidate will have strong hands-on experience with Cadence Virtuoso XL (VXL), a deep understanding of analog layout methodologies, and the ability to optimize layouts for performance, reliability, area, and manufacturability. You will collaborate closely with circuit designers and cross-functional engineering teams to deliver robust silicon-ready designs.

Requirements

Key Responsibilities

Develop and implement custom layouts for analog and mixed-signal circuit blocks while meeting design and process constraints
Create high-quality layouts using Cadence Virtuoso XL (VXL) for complex analog and high-speed IPs
Design layouts for critical analog blocks such as PLLs, ADCs, DACs, LDOs, Bandgap Reference Generators, Charge Pumps, Comparators, Oscillators, Current Mirrors, Differential Amplifiers, and Temperature Sensors
Design layouts for high-speed circuits including transmitters, receivers, clock generation circuits, and related interfaces
Perform floorplanning, placement, routing, and layout optimization to achieve performance, power, area, and reliability targets
Execute and debug physical verification checks including LVS, DRC, and other layout validation activities
Analyze and resolve layout-related issues impacting functionality, manufacturability, and performance
Apply analog layout best practices including matching techniques, common-centroid layouts, shielding, guard rings, and symmetry considerations
Address challenges related to electromigration, latch-up, coupling, crosstalk, IR drop, and parasitic effects
Optimize layouts for speed, capacitance, power consumption, signal integrity, and area efficiency
Support Engineering Change Orders (ECO), Layout Change Orders (LCO), and Design for Manufacturability (DFM) activities
Ensure adherence to technology design rules, project guidelines, and quality standards
Collaborate with design engineers to understand circuit requirements and implement optimal layout solutions
Participate in design reviews and contribute to continuous process improvements

What Makes You a Great Fit

Strong experience in Analog Layout Engineering and Custom Layout Design
Hands-on expertise with Cadence Virtuoso XL (VXL) and custom analog layout methodologies
Solid understanding of analog and mixed-signal design fundamentals
Experience designing layouts for critical analog building blocks and high-speed circuit components
Strong knowledge of physical verification flows including LVS, DRC, and layout debugging
Deep understanding of matching techniques, parasitic management, electromigration, latch-up prevention, crosstalk mitigation, and IR-drop analysis
Ability to evaluate layout trade-offs involving performance, power, area, and manufacturability
Familiarity with semiconductor process technologies, design rules, and fabrication requirements
Strong analytical thinking and problem-solving capabilities
Ability to work independently while collaborating effectively with circuit design and verification teams
Good verbal and written communication skills with a proactive approach to technical challenges
Detail-oriented mindset with a commitment to delivering high-quality, production-ready layouts
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