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Analog Layout Engineer
Accepting applicationsUST · Bengaluru, Karnataka, India
Full-Time Mid_senior AnalogRFanalogmixed-signal
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
India
Position: Analog Layout Engineer
Experience: 4+ Years
Job Summary:
We are seeking a highly motivated Analog Layout Engineer to join our semiconductor design team. The candidate will be responsible for the physical implementation of high-performance analog and mixed-signal circuits, ensuring compliance with technology design rules, matching requirements, and manufacturability constraints.
Key Responsibilities:
Develop and implement custom analog, mixed-signal, and RF layouts for advanced semiconductor technologies.
Perform layout of critical analog blocks such as:
Operational Amplifiers (Op-Amps)
Bandgap References
LDO Regulators
PLLs
ADCs/DACs
Charge Pumps
Data Converters
Ensure proper device matching, symmetry, shielding, and parasitic optimization.
Conduct floorplanning and placement of analog blocks.
Perform layout verification activities:
DRC (Design Rule Check)
LVS (Layout Versus Schematic)
ERC (Electrical Rule Check)
Antenna Checks
Density Checks
Extract parasitics and support post-layout simulation and signoff activities.
Collaborate closely with circuit designers, verification engineers, and foundry teams.
Debug and resolve layout-related issues to meet performance, area, and schedule targets.
Follow foundry design guidelines and process-specific requirements.
Show more Show less
Experience: 4+ Years
Job Summary:
We are seeking a highly motivated Analog Layout Engineer to join our semiconductor design team. The candidate will be responsible for the physical implementation of high-performance analog and mixed-signal circuits, ensuring compliance with technology design rules, matching requirements, and manufacturability constraints.
Key Responsibilities:
Develop and implement custom analog, mixed-signal, and RF layouts for advanced semiconductor technologies.
Perform layout of critical analog blocks such as:
Operational Amplifiers (Op-Amps)
Bandgap References
LDO Regulators
PLLs
ADCs/DACs
Charge Pumps
Data Converters
Ensure proper device matching, symmetry, shielding, and parasitic optimization.
Conduct floorplanning and placement of analog blocks.
Perform layout verification activities:
DRC (Design Rule Check)
LVS (Layout Versus Schematic)
ERC (Electrical Rule Check)
Antenna Checks
Density Checks
Extract parasitics and support post-layout simulation and signoff activities.
Collaborate closely with circuit designers, verification engineers, and foundry teams.
Debug and resolve layout-related issues to meet performance, area, and schedule targets.
Follow foundry design guidelines and process-specific requirements.
Show more Show less