S
AMS Spice Verification (BB50FT RM 4391)
Accepting applicationsSource-Right · Bengaluru, Karnataka, India
Full-Time Mid_senior AnalogCadenceMixed-SignalPower ManagementSPICE
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
India
Position: AMS Spice Verification (BB50FT RM 4391)
Requirements
Education & Experience: B.Tech/M.Tech with 5+ years of industry experience in Analog/Mixed-Signal (AMS) SPICE simulation at block, subsystem, and chip-top levels.
Technical Expertise: Strong understanding of analog design fundamentals and mixed-signal architectures, with exposure to complex SoC integrations involving Power Management, PLL/Synthesizers, ADC/DAC, Bandgap references, Oscillators/Clocking, SerDes, and related digital control systems.
AMS Verification & Simulation: Proven experience in verification planning, AMS SPICE testbench development, and debugging complex convergence issues.
EDA Tools Proficiency: Hands-on experience with Cadence Virtuoso for schematic capture and waveform analysis tools such as SimVision/Verisium.
Simulation Tools: Expertise in SPICE/Fast-SPICE simulators (Spectre, UltraSim, APS, XPS) and digital simulators (Cadence Xcelium/DMSO).
Test Development: Experience in developing robust, self-checking AMS SPICE testcases.
Debug & Optimization Skills: Strong track record in resolving complex AMS simulation challenges, including environment/setup issues, runtime optimization, convergence at AMS boundaries, analog-digital integration, loading, and stability concerns.
Collaboration: Ability to work effectively with cross-functional teams, including system architects, analog/digital design, and DV teams.
Learning Agility & Problem Solving: Quick learner with strong analytical and problem-solving capabilities.
Personal Attributes: Self-motivated, proactive, and enthusiastic team player.
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Requirements
Education & Experience: B.Tech/M.Tech with 5+ years of industry experience in Analog/Mixed-Signal (AMS) SPICE simulation at block, subsystem, and chip-top levels.
Technical Expertise: Strong understanding of analog design fundamentals and mixed-signal architectures, with exposure to complex SoC integrations involving Power Management, PLL/Synthesizers, ADC/DAC, Bandgap references, Oscillators/Clocking, SerDes, and related digital control systems.
AMS Verification & Simulation: Proven experience in verification planning, AMS SPICE testbench development, and debugging complex convergence issues.
EDA Tools Proficiency: Hands-on experience with Cadence Virtuoso for schematic capture and waveform analysis tools such as SimVision/Verisium.
Simulation Tools: Expertise in SPICE/Fast-SPICE simulators (Spectre, UltraSim, APS, XPS) and digital simulators (Cadence Xcelium/DMSO).
Test Development: Experience in developing robust, self-checking AMS SPICE testcases.
Debug & Optimization Skills: Strong track record in resolving complex AMS simulation challenges, including environment/setup issues, runtime optimization, convergence at AMS boundaries, analog-digital integration, loading, and stability concerns.
Collaboration: Ability to work effectively with cross-functional teams, including system architects, analog/digital design, and DV teams.
Learning Agility & Problem Solving: Quick learner with strong analytical and problem-solving capabilities.
Personal Attributes: Self-motivated, proactive, and enthusiastic team player.
Show more Show less