PC
Advance Packaging Engineer
Accepting applicationsPiper Companies · Saratoga, CA
Full-Time Mid_senior SoCateganrf
Posted
24 Apr
Category
Packaging
Experience
Mid_senior
Country
United States
Piper Companies is seeking an Advanced Packaging Engineer to support a leading organization in the semiconductor and high‑performance computing industry. The Advanced Packaging Engineer will play a critical role in next‑generation single‑chip, SoC, and multi‑component module packaging technologies, including CoWoS, 2.5D, and emerging 3D/TSV‑based integration.
Responsibilities of the Advanced Packaging Engineer:
Drive development of advanced single‑chip flip‑chip packaging and complex SoC/multi‑component module assemblies.
Lead design, analysis, and integration efforts for CoWoS, 2.5D, and early‑stage 3D/TSV packaging solutions.
Develop and optimize organic substrate architectures for high‑density, high‑performance applications (critical must‑have).
Collaborate with foundry partners, including TSMC, to support system‑on‑wafer packaging technology.
Qualifications of the Advanced Packaging Engineer:
5+ years of experience in advanced semiconductor packaging engineering.
Strong technical background in single‑chip flip‑chip packaging and SoC/multi‑component module integration.
Hands‑on expertise with CoWoS, 2.5D, and exposure to 3D/TSV packaging methodologies.
Deep understanding of organic substrate technology—this is a mandatory requirement.
Experience collaborating with TSMC on system‑on‑wafer development.
Knowledge of thermal, mechanical, and reliability modeling tools and best practices.
Compensation for the Advanced Packaging Engineer includes:
Salary range: $200,000 - $220,000 depending on experience
Comprehensive benefits package including medical, dental, vision, 401(k), and PTO
This job opens for applications on 04/24/2026. Applications for this job will be accepted for at least 30 days from the posting date.
#ONSITE
Show more Show less
Responsibilities of the Advanced Packaging Engineer:
Drive development of advanced single‑chip flip‑chip packaging and complex SoC/multi‑component module assemblies.
Lead design, analysis, and integration efforts for CoWoS, 2.5D, and early‑stage 3D/TSV packaging solutions.
Develop and optimize organic substrate architectures for high‑density, high‑performance applications (critical must‑have).
Collaborate with foundry partners, including TSMC, to support system‑on‑wafer packaging technology.
Qualifications of the Advanced Packaging Engineer:
5+ years of experience in advanced semiconductor packaging engineering.
Strong technical background in single‑chip flip‑chip packaging and SoC/multi‑component module integration.
Hands‑on expertise with CoWoS, 2.5D, and exposure to 3D/TSV packaging methodologies.
Deep understanding of organic substrate technology—this is a mandatory requirement.
Experience collaborating with TSMC on system‑on‑wafer development.
Knowledge of thermal, mechanical, and reliability modeling tools and best practices.
Compensation for the Advanced Packaging Engineer includes:
Salary range: $200,000 - $220,000 depending on experience
Comprehensive benefits package including medical, dental, vision, 401(k), and PTO
This job opens for applications on 04/24/2026. Applications for this job will be accepted for at least 30 days from the posting date.
#ONSITE
Show more Show less