TF
64Y-Microelectronics
Accepting applicationsThe Fountain Group · El Segundo, CA
Contract Mid_senior AISystemVerilogUVM
Posted
1d ago
Category
Verification
Experience
Mid_senior
Country
United States
We are a national staffing firm and are currently seeking a Verification Engineer for a prominent client of ours. This position is located in El Segundo, CA. Details of the position are as follows:
Job Description:
Pay is $90.06 - 112.80/hr to start!!
6 - month assignment with the potential for extension/conversion based on performance and budget.
Monday - Friday (8:00am - 4:30pm)
Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design.
Develops new concepts for future product designs to meet projected requirements
Recommends and manages technology insertion.
Qualifications:
Engineering-minded verification engineers, not simply engineers who write test cases.
7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
Strong SystemVerilog and UVM experience
Self-checking and constrained-random verification; verification planning
Debugging; coverage closure
Active U.S. security clearance
If you are interested in hearing more about the position, please respond to this post with your resume attached or contact me at 813.319.7084
Please forward this email to any friends or colleagues as we do offer a Referral Bonus for any candidate who is hired and still gainfully employed after 30 days.
By applying for this job, you agree to receive calls, AI-generated calls, text messages, or emails from and its affiliates, and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy at Privacy Policy
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Job Description:
Pay is $90.06 - 112.80/hr to start!!
6 - month assignment with the potential for extension/conversion based on performance and budget.
Monday - Friday (8:00am - 4:30pm)
Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design.
Develops new concepts for future product designs to meet projected requirements
Recommends and manages technology insertion.
Qualifications:
Engineering-minded verification engineers, not simply engineers who write test cases.
7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
Strong SystemVerilog and UVM experience
Self-checking and constrained-random verification; verification planning
Debugging; coverage closure
Active U.S. security clearance
If you are interested in hearing more about the position, please respond to this post with your resume attached or contact me at 813.319.7084
Please forward this email to any friends or colleagues as we do offer a Referral Bonus for any candidate who is hired and still gainfully employed after 30 days.
By applying for this job, you agree to receive calls, AI-generated calls, text messages, or emails from and its affiliates, and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy at Privacy Policy
Show more Show less