Tenstorrent
48 open semiconductor roles on SiliconBoard
Open positions at Tenstorrent
(India) System IP Design Engineer
Bengaluru, Karnataka, India
Automotive and Robotics SOC Architect
United States
Sr.Staff, Design Verification - CPU Cluster / SoC
Bengaluru, Karnataka, India
Technical Program Manager, Architecture
Santa Clara, CA
System IP RTL Design Lead
Bengaluru, Karnataka, India
Sr. Engineer/Staff Engineer, Design Verification,System IP
Bengaluru, Karnataka, India
Sr. Engineer, Performance Infrastructure
Austin, TX
Sr. Engineer, RTL Implementation
Austin, CA
CPU Core Design Verification Testbench Lead
Austin, CA
Sr. Engineer, Package Design
United States
Staff Engineer, CPU Core Verification
Bengaluru, Karnataka, India
CPU Core Design Verification Test Generator Lead
Austin, CA
SOC Emulation Engineer - Hardware Emulation Infrastructure
Austin, CA
Fabric SOC Architect
United States
Staff, Design for Test Engineer (DFT)
Bengaluru, Karnataka, India
Physical Design Flow Engineer
United States
CPU Verification Fellow, RISC-V High-Performance Processor
United States
Staff Engineer, Emulation Technical Lead
Austin, TX
Chip Design Lead
Austin, Texas Metropolitan Area
Chip Design Lead
Santa Clara County, CA
AI Performance Simulation Architect
United States
Sr. Engineer, CPU RTL Design
Austin, CA
Top Level Physical Design Engineer
Santa Clara, CA
Staff Engineer, Physical Design
Santa Clara, CA
RISC-V CPU Microarchitecture / RTL
United States
Physical Design Engineer - STA
Santa Clara, CA
Developer Relations Engineer, Advocacy
Santa Clara, CA
Physical Design Engineer, PnR
Santa Clara, CA
Full-Chip Physical Design Verification Engineer
Santa Clara, CA
Physical Design Engineer
Santa Clara, CA
PDK/CAD Engineer
Santa Clara, CA
IP Software Generalist
Austin, TX
AI/ML Physical Design Flow Engineer
Santa Clara, CA
AI/ML Physical Design Flow Engineer
Santa Clara, CA
Mixed-Signal IC Layout Design Engineer
United States
Mixed-Signal IC Layout Design Engineer
United States
Staff Engineer, CPU Core Verification
Austin, TX
Chiplet Physical Design Engineer
United States
SoC Top-Level Physical Design Engineer
Santa Clara, United States, North America
Static Timing Analysis (STA) Methodology Engineer
Santa Clara, United States, North America
Formal Verification Engineer
United States
Staff Physical Design Engineer – EMIR
Austin, TX
SoC Physical Design Verification Engineer
Santa Clara, United States, North America
Staff Design for Test Engineer
Austin, United States, North America
Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)
United States, United States, North America
ASIC Networking Engineer
United States, United States, North America
Silicon Validation Engineer
Santa Clara, United States, North America
Staff Analog Design Engineer
United States, United States, North America