Tenstorrent

Tenstorrent

54 open semiconductor roles on SiliconBoard

Open positions at Tenstorrent

DFT Engineer

United States

Full-Time Principal Test
2w ago

CPU Block level Verification Engineer - AI Silicon (Bangalore, India)

Bangalore Urban, Karnataka, India

Full-Time Mid-senior Verification
2w ago

Technical Program Manager, Product Software

Santa Clara, CA

Full-Time Principal Design
3w ago

Sr Staff Engineer, SoC RTL Design

Austin, Texas Metropolitan Area

Full-Time Senior Design
3w ago

Sr Staff Engineer, SoC RTL Design

Boston, MA

Full-Time Senior Design
3w ago

Sr. Engineer, RTL Implementation

Santa Clara County, CA

Full-Time Senior Design
24 Jun 2026

(India) System IP Design Engineer

Bengaluru, Karnataka, India

Full-Time Mid-senior Design
22 Jun 2026

Automotive and Robotics SOC Architect

United States

Full-Time Mid Design
19 Jun 2026

Sr.Staff, Design Verification - CPU Cluster / SoC

Bengaluru, Karnataka, India

Full-Time Senior Verification
18 Jun 2026

Technical Program Manager, Architecture

Santa Clara, CA

Full-Time Principal Design
18 Jun 2026

System IP RTL Design Lead

Bengaluru, Karnataka, India

Full-Time Lead Design
17 Jun 2026

Sr. Engineer/Staff Engineer, Design Verification,System IP

Bengaluru, Karnataka, India

Full-Time Senior Verification
15 Jun 2026

Sr. Engineer, Performance Infrastructure

Austin, TX

Full-Time Senior Design
14 Jun 2026

Sr. Engineer, RTL Implementation

Austin, CA

Full-Time Senior Design
13 Jun 2026

CPU Core Design Verification Testbench Lead

Austin, CA

Full-Time Senior Verification
13 Jun 2026

Sr. Engineer, Package Design

United States

Full-Time Mid-senior Packaging
12 Jun 2026

Staff Engineer, CPU Core Verification

Bengaluru, Karnataka, India

Full-Time Senior Verification
10 Jun 2026

CPU Core Design Verification Test Generator Lead

Austin, CA

Full-Time Senior Verification
6 Jun 2026

SOC Emulation Engineer - Hardware Emulation Infrastructure

Austin, CA

Full-Time Associate Verification
3 Jun 2026

Fabric SOC Architect

United States

Full-Time Mid Test
30 May 2026

Staff, Design for Test Engineer (DFT)

Bengaluru, Karnataka, India

Full-Time Mid-senior Test
29 May 2026

Physical Design Flow Engineer

United States

Full-Time Mid-senior Design
28 May 2026

CPU Verification Fellow, RISC-V High-Performance Processor

United States

Full-Time Executive Verification
28 May 2026

Staff Engineer, Emulation Technical Lead

Austin, TX

Full-Time Senior Verification
28 May 2026

Chip Design Lead

Austin, Texas Metropolitan Area

Full-Time Lead Design
27 May 2026

Chip Design Lead

Santa Clara County, CA

Full-Time Lead Design
27 May 2026

AI Performance Simulation Architect

United States

Full-Time Mid Test
27 May 2026

Sr. Engineer, CPU RTL Design

Austin, CA

Full-Time Senior Design
22 May 2026

Top Level Physical Design Engineer

Santa Clara, CA

Full-Time Senior Design
8 May 2026

Staff Engineer, Physical Design

Santa Clara, CA

Full-Time Senior Design
7 May 2026

RISC-V CPU Microarchitecture / RTL

United States

Full-Time Mid Design
6 May 2026

Physical Design Engineer - STA

Santa Clara, CA

Full-Time Mid-senior Test
6 May 2026

Developer Relations Engineer, Advocacy

Santa Clara, CA

Full-Time Mid Test
6 May 2026

Physical Design Engineer, PnR

Santa Clara, CA

Full-Time Mid Design
4 May 2026

Full-Chip Physical Design Verification Engineer

Santa Clara, CA

Full-Time Senior Design
1 May 2026

Physical Design Engineer

Santa Clara, CA

Full-Time Mid Design
1 May 2026

PDK/CAD Engineer

Santa Clara, CA

Full-Time Mid-senior Eda
1 May 2026

IP Software Generalist

Austin, TX

Full-Time Mid Test
29 Apr 2026

AI/ML Physical Design Flow Engineer

Santa Clara, CA

Full-Time Entry Eda
25 Apr 2026

AI/ML Physical Design Flow Engineer

Santa Clara, CA

Full-Time Mid-senior Eda
25 Apr 2026

Mixed-Signal IC Layout Design Engineer

United States

Full-Time Entry Design
23 Apr 2026

Mixed-Signal IC Layout Design Engineer

United States

Full-Time Principal Design
23 Apr 2026

Staff Engineer, CPU Core Verification

Austin, TX

Full-Time Senior Verification
21 Apr 2026

Chiplet Physical Design Engineer

United States

Full-Time Entry Test
19 Apr 2026

SoC Top-Level Physical Design Engineer

Santa Clara, United States, North America

Full-Time Mid Design
16 Apr 2026

Static Timing Analysis (STA) Methodology Engineer

Santa Clara, United States, North America

Full-Time Mid Test
16 Apr 2026

Formal Verification Engineer

United States

Full-Time Entry Verification
16 Apr 2026

Staff Physical Design Engineer – EMIR

Austin, TX

Full-Time Mid-senior Design
16 Apr 2026

SoC Physical Design Verification Engineer

Santa Clara, United States, North America

Full-Time Mid Design
15 Apr 2026

Staff Design for Test Engineer

Austin, United States, North America

Full-Time Senior Test
15 Apr 2026

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

United States, United States, North America

Full-Time Mid Design
10 Apr 2026

ASIC Networking Engineer

United States, United States, North America

Full-Time Mid Design
10 Apr 2026

Silicon Validation Engineer

Santa Clara, United States, North America

Full-Time Mid Test
9 Apr 2026

Staff Analog Design Engineer

United States, United States, North America

Full-Time Senior Design
8 Apr 2026