Samsung Semiconductor
86 open semiconductor roles on SiliconBoard
Open positions at Samsung Semiconductor
Failure Analysis Engineer
Taylor, TX
Failure Analysis Nanoprobe Engineer
Taylor, TX
Senior Staff Engineer, Post-Silicon GPU Power & Performance
Austin, Texas Metropolitan Area
Etch Equipment Engineer - Days
Austin, TX
Staff Engineer, Memory Systems Architecture
San Jose, CA
Senior Application Engineer, CMOS Image Sensor
San Jose, CA
T1 Manufacturing Quality & Reliability (MQR) Engineer
Taylor, TX
Staff Engineer, RTL Design
San Jose, CA
Staff Engineer, SRAM Circuit Design
San Jose, CA
Micro-architect/Logic Designer, Coherent Interconnect
Austin, Texas Metropolitan Area
Micro-architect/Logic Designer, Coherent Interconnect
San Jose, CA
SoC Architect, Coherent Interconnect
San Jose, CA
Performance Architect
Austin, Texas Metropolitan Area
Defect Reduction Engineer
Taylor, TX
Staff Engineer, GPU Front-End Infrastructure/ Methodology
Austin, Texas Metropolitan Area
Staff Engineer, RTL Memory Centric Computing
San Jose, CA
Principal Engineer, CPU Architecture & Performance Research
San Jose, CA
SoC Architect, Coherent Interconnect
Austin, Texas Metropolitan Area
Staff Engineer, FPGA
San Jose, CA
Yield Engineer
Taylor, TX
Principal Engineer, RFIC
San Jose, CA
Module Integration Engineer
Taylor, TX
Senior Staff Engineer, RTL Memory Centric Computing
San Jose, CA
Mechanical Design Engineer
Austin, TX
Process Integration Engineer
Austin, TX
Device Integration Engineer
Taylor, TX
Metrology Equipment Engineer
Taylor, TX
Senior STA Engineer
Bengaluru, Karnataka, India
Senior Engineer, AI/ML and Infrastructure
Austin, Texas Metropolitan Area
Staff Engineer - SSD firmware validation (NVMe/PCIe)
San Jose, CA
Senior Engineer, RTL
San Jose, CA
Principal Engineer, AI Serving Framework Architect (Software)
San Jose, CA
Senior Staff Engineer, AI Infrastructure
San Jose, CA
Principal Engineer, AI System Architect (Hardware)
San Jose, CA
Principal Engineer, RTL Power Macromodeling
San Jose, CA
Senior Engineer, GPU Performance Architect (PPA)
San Jose, CA
Lead Memory Controller Micro-Architect
Austin, Texas Metropolitan Area
Senior Manager, Serdes Analog Design
San Jose, CA
Senior Engineer, GPU Performance Architect (PPA)
San Diego, CA
Senior Engineer, GPU RTL Power
Austin, Texas Metropolitan Area
Senior Staff Engineer, SOC Architect and Hardware Engineering
San Jose, CA
Staff Engineer, SSD Qualification
San Jose, CA
Senior Engineer, RTL Design
San Jose, CA
Staff Engineer, ASIC Design Verification
San Jose, CA
Diffusion Equipment Engineer - Day or Night
Taylor, TX
Principal Engineer, GPU Design Verification (Subsystems)
Austin, Texas Metropolitan Area
Principal Engineer, GPU Design Verification (Subsystems)
San Jose, CA
Director, Design Verification
San Jose, CA
Senior Staff Engineer, Design Verification
San Jose, CA
Senior Engineer, Physical Design Floorplan
San Jose, CA
Senior Engineer, Physical Design Floorplan
Austin, Texas Metropolitan Area
Wafer Sort Test Engineer
Austin, TX
Staff Engineer, GPU Design Verification (Subsystems)
San Jose, CA
Staff Engineer, GPU Design Verification (Subsystems)
Austin, Texas Metropolitan Area
Staff Engineer, SRAM Layout
San Jose, CA
Staff Engineer, GPU Post-Silicon Debug & Validation (GPU Si & Emulation)
Austin, Texas Metropolitan Area
Virtual Metrology Engineer
Taylor, TX
Staff Engineer, Design Verification
San Jose, CA
Design Verification Engineer, Memory Controller
San Jose, CA
Design Verification Engineer, Memory Controller
Austin, Texas Metropolitan Area
Staff Engineer, Design Verification
San Jose, CA
Design Verification Engineer, Memory Controller
San Jose, CA
Layout Designer
Taylor, TX
Diffusion Equipment Engineer
Austin, TX
Metrology Equipment Engineer
Austin, TX
Metrology Equipment Engineer - Day
Taylor, TX
Implant Equipment Engineer - Day or Night
Taylor, TX
Implant Equipment Engineer - Day or Night
Taylor, TX
Layout Designer
Taylor, TX
Metrology Equipment Engineer
Austin, TX
Metrology Equipment Engineer - Day
Taylor, TX
Implant Equipment Engineer
Taylor, TX
Diffusion Equipment Engineer
Austin, TX
Infra Designer
Taylor, TX
GPU Design Verification Engineer (GCDV)
San Jose, CA
GPU Design Verification Engineer (GCDV)
Austin, Texas Metropolitan Area
PCS Equipment Engineer
Austin, TX
Infra Designer
Taylor, TX
GPU Design Verification Engineer (GCDV)
San Jose, CA
GPU Design Verification Engineer (GCDV)
Austin, Texas Metropolitan Area
Design Verification Engineer, Coherent Interconnect
San Jose, CA
Design Verification Engineer, Coherent Interconnect
Austin, Texas Metropolitan Area
Staff Engineer, Analog-Mixed Circuit Design
San Jose, United States, North America
Staff Engineer, GPU RTL Power Management
Austin, Texas Metropolitan Area
Principal Engineer, SOC Design
San Jose, United States, North America
Senior Staff Engineer, SOC Design
Folsom, United States, North America