Palo Alto Networks

Palo Alto Networks

4 open semiconductor roles on SiliconBoard

Open positions at Palo Alto Networks

ASIC Design Verification Engineer

Santa Clara, United States, North America

Full-Time Mid Verification
8 Apr 2026

Principal ASIC Design Verification Engineer

Santa Clara, United States, North America

Full-Time Mid Verification
2 Apr 2026

Distinguished Software Engineer (DLP Platform Architecture, Scale, and Advanced DLP Detection)

Santa Clara, United States, North America

Full-Time Senior Test
1 Apr 2026

Senior Principal ASIC Design Engineer

Santa Clara, United States, North America

Full-Time Senior Design
31 Mar 2026