Palo Alto Networks
13 open semiconductor roles on SiliconBoard
Open positions at Palo Alto Networks
Senior ASIC CAD Engineer
Santa Clara, CA
Full-Time Mid-senior Design
Sr ASIC Design Verification Engineer (NetSec)
Santa Clara, CA
Full-Time Mid-senior Verification
Senior ASIC/System Architect (NetSec)
Santa Clara, CA
Full-Time Mid-senior Design
Power Engineer
Santa Clara, CA
Full-Time Associate Design
Senior Software Engineer, Prisma SD-WAN (Platform & Networking) - NetSec
Bengaluru East, Karnataka, India
Full-Time Associate Design
Senior Principal Engineer Test
Santa Clara, CA
Full-Time Mid-senior Test
Sr Staff Electronic Design Verification Test (EDVT Engineer Hardware
Santa Clara, CA
Full-Time Associate Test
Principal Software Engineer
Santa Clara, CA
Full-Time Associate Test
Principal Engineer Software, Production Engineering (Chronosphere)
New York, NY
Full-Time Associate Test
ASIC Design Verification Engineer
Santa Clara, United States, North America
Full-Time Mid Verification
Principal ASIC Design Verification Engineer
Santa Clara, United States, North America
Full-Time Mid Verification
Distinguished Software Engineer (DLP Platform Architecture, Scale, and Advanced DLP Detection)
Santa Clara, United States, North America
Full-Time Senior Test
Senior Principal ASIC Design Engineer
Santa Clara, United States, North America
Full-Time Senior Design